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Assembler 8086The 8086 has 40 pins and 29000 transistors and operates at a frequency between 5 and 10 MHz depending on the version. Needs of a single V supply of 5V. 16-bit (data).There are different registers can be divided mainly into 3 categories. Registers of data (AX, BX, CX, DX), pointer registers (IP, SP, BP, SI, DI), segment registers (CS, DS, ES,SS).

To calculate the addresses 8086 adds the contents of a register BX or a pointer type to that contained in asegment register shifted to the left of 4 positions. The physical address is then 20bit.

The condition flags are written directly to the end of each operation performed by the processor.

The control flag may be written or modified, and used to adjust certain features of the processor.

The 8086 is able to read a word in one step if it is equal to a memory address, in two steps if it is at an odd address:address space is equal to 1Mbyte. Some parts of thememory are not writable: for example the upper part of the memory is occupied by the Interrupt Vector Table, while the lower is intended to reset Bootstrap and future use.

The 8086 makes use of the mechanism of two-stagepipeline, which if fully utilized can halve the execution time of procedures. The pipeline in question is not idealbecause BIU and EU do not have the same execution time.

The execution unit (EU) has the task of decoding andexecuting instructions. It receives from BIU decodes,generates the addresses of operands and executes it,updating the flags.

Assembler 8086The 8086 is fitted with one STACK. It is managed by theSP two addresses pointing to the head of the SS and thestack pointing to the last cell of the STACK allocable. The stack is also used in jump instructions in the procedure. Inthis case the starting IP is pushed on the stack and the stack is extracted (POP) at the time of the call RETURN.

Nell'8086 the choice of the management policy of the I / O(memory mapped or isolated) is left to the user. Theaddress space is still limited to 64k.

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